1. Field of the Invention
The present invention relates to a computer system comprising at least two individual computers and at least one system bus bar, and more particularly to such a system in which the system bus bar comprises a system data bus and a system address bus, and wherein between one of the individual computers and the system bus bar there is arranged, in each case, a traffic memory which is designed for optional access from the system bar or from the individual computer.
2. Description of the Prior Art
In my earlier U.S. patent application, Ser. No. 732,988, I describe a computer system of the type generally referred to above. In this computer system, the entire data traffic is carried out sequentially by way of the system bus bar. The system data bus serves to transmit data whose width is equal to the processing width (word width) of the individual computers, and the system address bus serves to transmit the associated memory addresses. The traffic memories which serve as coupling elements are alternately connected either to the individual computers (therein referred to as the autonomous phase) or to the system bus bar (therein referred to as control and data exchange phases.
The efficiency of computer systems comprising a plurality of individual computers is generally dependent upon the speed of the information exchange between the individual computers. This efficiency is the greater, the more rapid the information exchange can take place.